Theory of Operation
1-8 WFM700 Series Waveform Monitors Service Manual
Reference Module
CPU
Board
EQ
Eye
Sampler
HD/SD
Serial In
A
B
Second
Input slot
VGA
Controller
VGA MUX
LCD
Panel
VGA
output
Front panel controls
and touch screen
Power Supply
Module
Main Interface Board
Audio
Input Module
Picture Mode
Processing
RTD Module
Rasterizer
Fast Static
Memory
Measurement
Processing
Polyphase
Interpolator
Selector
Selector
VGA PIX Mon
Aux Out 1
Aux Out 2
PIX B/Pb
PIX R/Pr
PIX G/Y
Ref In Loop
Through
Sync
Stripper
PLL Osc
TRS
Generation
EQ
FPGA for
Full-Speed Data
Massaging
DAC
Serial to Parallel
Conversion
Mezzanine
Board
HD/SD
Input
Board
HD SDClk
20 Bits at 75 MHz
plus clock and sync
Timing Bus
Analog Bus
Audio Bus
HD
SD
I/O
Buffers
AES
I/O
I/O
Buffers
Figure 1- 1: WFM700 signal flow block diagram
