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Memory Management Unit
MOTOROLA
M68060 USER’S MANUAL
4-15
X—Motorola Reserved
These bit fields are reserved for future use by Motorola.
4.2.3 Translation Table Example
Figure 4-12 illustrates an access example to the logical address $76543210 while in the
supervisor mode with an 8-Kbyte memory page size. The RI field of the logical address, $3B,
is mapped into bits 8–2 of the SRP value to select a 32-bit root table descriptor at a root-
level table. The selected root table descriptor points to the base of a pointer-level table, and
the PI field of the logical address, $15, is mapped into bits 8–2 of this base address to select
a pointer descriptor within the table. This pointer table descriptor points to the base of a
page-level table, and the PGI field of the logical address, $1, is mapped into bits 6–2 of this
base address to select a page descriptor within the table.
Figure 4-12. Example Translation Table
ROOT LEVEL
TABLES
POINTER LEVEL
TABLES
PAGE LEVEL
TABLES
0111011001010100001XXXXXXXXXXXXX
ROOT INDEX POINTER INDEX PAGE INDEX PAGE OFFSET
LOGICAL ADDRESS
$76543210 =
$3B $15 $01
TABLE ENTRY # =
TABLE $3B TABLE $15
SUPERVISOR
MODE
TABLE $00
TABLE $7F TABLE $1F
TABLE $00 TABLE $00
$3B
$EC $54 $04
ADDRESS OFFSET =
$00001800 $00003000
FRAME ADDRESS
SRP
$15 $01
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