Loading...
MOTOROLA
M68060 USER’S MANUAL
ix
TABLE OF CONTENTS
Section 1
Introduction
1.1 Differences Among M68060 Family Members.............................................. 1-3
1.1.1 MC68LC060................................................................................................ 1-3
1.1.2 MC68EC060 ............................................................................................... 1-3
1.1.2.1 Address Translation Differences .............................................................. 1-3
1.1.2.2 Instruction Differences.............................................................................. 1-3
1.2 Features........................................................................................................ 1-4
1.3 Architecture................................................................................................... 1-4
1.4 Processor Overview...................................................................................... 1-5
1.4.1 Functional Blocks........................................................................................ 1-5
1.4.2 Integer Unit ................................................................................................. 1-7
1.4.2.1 Instruction Fetch Unit................................................................................ 1-7
1.4.2.2 Integer Unit ............................................................................................... 1-8
1.4.2.3 Floating-Point Unit .................................................................................... 1-8
1.4.2.4 Memory Units ........................................................................................... 1-9
1.4.2.5 Address Translation Caches .................................................................... 1-9
1.4.2.6 Instruction and Data Caches .................................................................... 1-9
1.4.2.6.1 Cache Organization.............................................................................. 1-10
1.4.2.6.2 Cache Coherency................................................................................. 1-10
1.4.3 Bus Controller ...........................................................................................1-10
1.5 Processing States ....................................................................................... 1-10
1.6 Programming Model....................................................................................1-11
1.7 Data Format Summary................................................................................1-14
1.8 Addressing Capabilities Summary .............................................................. 1-14
1.9 Instruction Set Overview ............................................................................. 1-15
1.10 Notational Conventions............................................................................... 1-21
Section 2
Signal Description
2.1 Address and Control Signals ........................................................................ 2-3
2.1.1 Address Bus (A31–A0) ............................................................................... 2-3
2.1.2 Cycle Long-Word Address (CLA) ............................................................... 2-4
2.2 Data Bus (D31–D0).......................................................................................2-4
2.3 Transfer Attribute Signals ............................................................................. 2-4
2.3.1 Transfer Cycle Type (TT1, TT0) ................................................................. 2-4
2.3.2 Transfer Cycle Modifier (TM2–TM0)........................................................... 2-4
2.3.3 Transfer Line Number (TLN1, TLN0).......................................................... 2-5
2.3.4 User-Programmable Page Attributes (UPA1, UPA0).................................. 2-5
2.3.5 Read/Write (R/W) ....................................................................................... 2-6
Loading...
Terms of Use | Privacy Policy | DMCA Policy
2006-2020 Rsmanuals.com