Rn Any Address or Data Register
Rx, Ry Any source and destination registers, respectively.
Xn Index Register—An, Dn, or suppressed.
Data Format and Type
+ inf Positive Infinity
<fmt> Operand Data Format: Byte (B), Word (W), Long (L), Single (S), Double (D), Extended (X), or
Packed (P).
B, W, L Specifies a signed integer data type (twos complement) of byte, word, or long word.
D Double-precision real data format (64 bits).
kA twos complement signed integer (–64 to +17) specifying a number’s format to be stored in the
packed decimal format.
P Packed BCD real data format (96 bits, 12 bytes).
S Single-precision real data format (32 bits).
X Extended-precision real data format (96 bits, 16 bits unused).
– inf Negative Infinity
Subfields and Qualifiers
#<xxx> or #<data> Immediate data following the instruction word(s).
( ) Identifies an indirect address in a register.
[ ] Identifies an indirect address in memory.
bd Base Displacement
dnDisplacement Value, n Bits Wide (example: d16 is a 16-bit displacement).
LSB Least Significant Bit
LSW Least Significant Word
MSB Most Significant Bit
MSW Most Significant Word
od Outer Displacement
SCALE A scale factor (1, 2, 4, or 8, for no-word, word, long-word, or quad-word scaling, respectively).
SIZE The index register’s size (W for word, L for long word).
{offset:width} Bit field selection.
Register Codes
* General Case.
C Carry Bit in CCR
cc Condition Codes from CCR
FC Function Code
N Negative Bit in CCR
U Undefined, Reserved for Motorola Use.
V Overflow Bit in CCR
X Extend Bit in CCR
Z Zero Bit in CCR
Not Affected or Applicable.
<ea> Effective Address
<label> Assemble Program Label
<list> List of registers, for example D3–D0.
LB Lower Bound
m Bit m of an Operand
m–n Bits m through n of Operand
UB Upper Bound
Table 1-4. Notational Conventions (Continued)
Terms of Use | Privacy Policy | DMCA Policy
2006-2020 Rsmanuals.com