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Introduction
1-18 M68060 USER’S MANUAL MOTOROLA
FINT Floating-Point Integer Part FINT.<fmt><ea>,FPn
FINT.X FPm,FPn
FINT.X FPn
FINTRZ Floating-Point Integer Part, Round-to-Zero FINTRZ.<fmt><ea>,FPn
FINTRZ.X FPm,FPn
FINTRZ.X FPn
FMOVE Source ˘ Destination
FMOVE.<fmt> <ea>,FPn
FMOVE.<fmt> FPm,<ea>
FMOVE.P FPm,<ea>{Dn}
FMOVE.P FPm,<ea>{#k}
FrMOVE.<fmt> <ea>,FPn3
FMOVE Source ˘ Destination FMOVE.L <ea>,FPcr
FMOVE.L FPcr,<ea>
FMOVEM9Register List ˘ Destination
Source ˘ Register List
FMOVEM.X <list>,<ea>4
FMOVEM.X Dn,<ea>
FMOVEM.X <ea>,<list>4
FMOVEM.X <ea>,Dn
FMOVEM9Register List ˘ Destination
Source ˘ Register List FMOVEM.L <list>,<ea>5
FMOVEM.L <ea>,<list>5
FMUL Source × FPn ˘ FPn
FMUL.<fmt> <ea>,FPn
FMUL.X FPm,FPn
FrMUL<fmt> <ea>,FPn3
FrMUL.X FPm,FPn3
FNEG –(Source) ˘ FPn
FNEG.<fmt> <ea>,FPn
FNEG.X FPm,FPn
FNEG.X FPn
FrNEG.<fmt> <ea>,FPn3
FrNEG.X FPm,FPn3
FrNEG.X FPn3
FNOP None FNOP
FRESTORE
If in supervisor state
then FPU State Frame ˘ Internal State
else TRAP FRESTORE <ea>
FSAVE
If in supervisor state
then FPU Internal State ˘ State Frame
else TRAP FSAVE <ea>
FScc2If condition true
then 1s ˘ Destination
else 0s ˘ Destination FScc.SIZE <ea>
FSGLDIV FPn ÷ Source ˘ FPn FSGLDIV.<fmt> <ea>,FPn
FSGLDIV.X FPm,FPn
FSGLMUL Source × FPn ˘ FPn FSGMUL.<fmt> <ea>,FPn
FSGLMUL.X FPm, FPn
FSQRT Square Root of Source ˘ FPn
FSQRT.<fmt> <ea>,FPn
FSQRT.X FPm,FPn
FSQRT.X FPn
FrSQRT.<fmt> <ea>,FPn3
FrSQRT FPm,FPn3
FrSQRT FPn3
FSUB FPn – Source ˘ FPn
FSUB.<fmt> <ea>,FPn
FSUB.X FPm,FPn
FrSUB.<fmt> <ea>,FPn3
FrSUB.X FPm,FPn3
FTRAPcc2If condition true
then TRAP
FTRAPcc
FTRAPcc.W #<data>
FTRAPcc.L #<data>
FTST Condition Codes for Operand ˘ FPCC FTST.<fmt> <ea>
FTST.X FPm
ILLEGAL
SSP – 2 ˘ SSP; Vector Offset ˘ (SSP);
SSP – 4 ˘ SSP; PC ˘ (SSP);
SSp – 2 ˘ SSP; SR ˘ (SSP);
Illegal Instruction Vector Address ˘ PC
ILLEGAL
JMP Destination Address ˘ PC JMP <ea>
Table 1-3. Instruction Set Summary (Continued)
Opcode Operation Syntax
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