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Instruction Execution Timing
MOTOROLA M68060 USER’S MANUAL 10-21
10.11 BRANCH INSTRUCTION EXECUTION TIMES
Table 10-17, Table 10-18, and Table 10-19 indicate the number of clock cycles required for
execution of the branch, jump, and return instructions. The number of operand read and
write cycles is shown in parentheses (r/w). Where indicated, the number of clock cycles and
r/w cycles must be added to those required for effective address calculation.
1 Add the effective address calculation time for each entry.
Table 10-17. Branch Execution Times
Instruction
Not
Predicted,
Forward,
Taken
Not
Predicted,
Forward,
Not Taken
Not
Predicted,
Backward,
Taken
Not
Predicted,
Backward,
Not Taken
Predicted
Correctly as
Taken
Predicted
Correctly as
Not Taken
Predicted
Incorrectly
Bcc 7(0/0) 1(0/0) 3(0/0) 7(0/0) 0(0/0) 1(0/0) 7(0/0)
BRA 3(0/0) — 3(0/0) — 0(0/0) —
BSR 3(0/1) — 3(0/1) — 1(0/1) —
DBcc 3(0/0) 8(0/0) 3(0/0) 8(0/0) 2(0/0) 2(0/0) 8(0/0)
DBRA 3(0/0) 7(0/0) 3(0/0) 7(0/0) 1(0/0) 1(0/0) 7(0/0)
FBcc 8(0/0) 2(0/0) 8(0/0) 2(0/0) 2(0/0) 2(0/0) 8(0/0)
Table 10-18. JMP, JSR Execution Times1
Instruction
Not
Predicted,
Forward,
Taken
Not
Predicted,
Forward,
Not Taken
Not
Predicted,
Backward,
Taken
Not
Predicted,
Backward,
Not Taken
Predicted
Correctly as
Taken
Predicted
Correctly as
Not Taken
Predicted
Incorrectly
JMP (d16,PC) 3(0/0) 3(0/0) —— 0(0/0)
JMP xxx.WL 3(0/0) 3(0/0) 0(0/0)
Remaining JMP 5(0/0) 5(0/0) 5(0/0)
JSR (d16,PC) 3(0/1) 3(0/1) 1(0/1)
JSR xxx.WL 3(0/1) 3(0/1) 1(0/1)
Remaining JSR 5(0/1) 5(0/1) 5(0/1)
Table 10-19. Return Instruction Execution Times
Instruction Execution Time
RTD 7(1/0)
RTE 17(3/0)
RTR 8(2/0)
RTS 7(1/0)
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