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Instruction Execution Timing
10-20 M68060 USER’S MANUAL MOTOROLA
1 Add 2(1/0) cycles to the (bd,An,Xi*SF) time for a memory indirect address.
1 The type of offset and width (static, dynamic) does not affect the execution time.
2 Add 2(1/0) cycles to the (bd,An,Xi*SF) time for a memory indirect address.
Table 10-15. Bit Manipulation (Static Bit Count) Execution Times
Instruction Size
Destination
Dn A
n(An) (An)+ –(An) (d16,An) (d8,An,XiSF) (bd,An,XiSF)1(xxx).WL
BCHG Byte 1(1/1) 1(1/1) 1(1/1) 2(1/1) 2(1/1) 3(1/1) 2(1/1)
Long 1(0/0) — — —
BCLR Byte 1(1/1) 1(1/1) 1(1/1) 2(1/1) 2(1/1) 3(1/1) 2(1/1)
1(0/0) — — —
BSET Byte — 1(1/1) 1(1/1) 1(1/1) 2(1/1) 2(1/1) 3(1/1) 2(1/1)
Long 1(0/0) — — —
BTST Byte 1(1/0) 1(1/0) 1(1/0) 2(1/0) 2(1/0) 3(1/0) 2(1/0)
Long 1(0/0) — — —
Table 10-16. Bit Field Execution Times1
Instruction Destination
Dn An (An) (An)+ –(An) (d16,An) (d8,An,XiSF) (bd,An,XiSF)2(xxx).WL
BFCHG (< 5 Bytes) 8(0/0) 8(2/1) 8(2/1) 9(2/1) 10(2/1) 9(2/1)
BFCHG(= 5 Bytes) 12(0/0) 12(4/2) 12(4/2) 13(4/2) 14(4/2) 13(4/2)
BFCLR (< 5 Bytes) 8(0/0) 8(2/1) 8(2/1) 9(2/1) 10(2/1) 9(2/1)
BFCLR(= 5 Bytes) 12(0/0) 12(4/2) 12(4/2) 13(4/2) 14(4/2) 13(4/2)
BFEXTS(< 5 Bytes) 6(0/0) 6(1/0) 6(1/0) 7(1/0) 8(1/0) 7(1/0)
BFEXTS(= 5 Bytes) 8(0/0) 8(2/0) 8(2/0) 9(2/0) 10(2/0) 9(2/0)
BFEXTU(< 5 Bytes) 6(0/0) 6(1/0) 6(1/0) 7(1/0) 8(1/0) 7(1/0)
BFEXTU(= 5 Bytes) 8(0/0) 8(2/0) 8(2/0) 9(2/0) 10(2/0) 9(2/0)
BFFFO(< 5 Bytes) 9(0/0) 9(1/0) 9(1/0) 10(1/0) 11(1/0) 10(1/0)
BFFFO(= 5 Bytes) 11(0/0) 11(2/0) 11(2/0) 12(2/0) 13(2/0) 12(2/0)
BFINS (< 5 Bytes) 6(0/0) 6(1/1) 6(1/1) 7(1/1) 8(1/1) 7(1/1)
BFINS(= 5 Bytes) 6(0/0) 6(2/2) 6(2/2) 7(2/2) 8(2/2) 7(2/2)
BFSET(< 5 Bytes) 8(0/0) 8(2/1) 8(2/1) 9(2/1) 10(2/1) 9(2/1)
BFSET(= 5 Bytes) 12(0/0) 12(4/2) 12(4/2) 13(4/2) 14(4/2) 13(4/2)
BFTST (< 5 Bytes) 6(0/0) 6(1/0) 6(1/0) 7(1/0) 8(1/0) 7(1/0)
BFTST(= 5 Bytes) 8(0/0) 8(2/0) 8(2/0) 9(2/0) 10(2/0) 9(2/0)
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