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Instruction Execution Timing
10-16 M68060 USER’S MANUAL MOTOROLA
10.6 STANDARD INSTRUCTION EXECUTION TIMES
Table 10-9 shows the number of clock cycles required for execution of the standard instruc-
tions, including completion of the operation and storing of the result. The number of operand
read and write cycles is shown in parentheses (r/w). In this table, <ea> denotes any effective
address and <M> denotes a memory operand. For all instructions in Table 10-9, the clock
cycles and r/w cycles for the effective address calculation (Table 10-5) must be added to the
values listed.
1 For entries in this column, add one cycle if the <ea> is (Ay)+, –(Ay) and Ay = An
2 Word divides have conditional exit points.
3 Add one cycle to the effective address calculation time for all addressing modes except Rn, (An), (An)+, –(An),
(d16,An), and (d16,PC)
Table 10-9. Standard Instruction Execution Time
Instruction Size op <ea>,An1op <ea>,Dn op Dn,<M>
ADD Byte, Word 1(1/0) 1(1/0) 1(1/1)
Long 1(1/0) 1(1/0) 1(1/1)
AND Byte, Word —— 1(1/0) 1(1/1)
Long 1(1/0) 1(1/1)
CMP Byte, Word 1(1/0) 1(1/0)
Long 1(1/0) 1(1/0)
DIVS Word — <=22(1/0)2
Long3 38(1/0)
DIVU Word <=22(1/0)2
Long3 38(1/0) —
EOR Byte, Word 1(1/0) 1(1/1)
Long 1(1/0) 1(1/1)
MULS Word 2(1/0)
'” Long3 2(1/0) —
MULU Word 2(1/0)
Long3 2(1/0) —
OR Byte, Word 1(1/0) 1(1/1)
Long 1(1/0) 1(1/1)
SUB Byte, Word 1(1/0) 1(1/0) 1(1/1)
Long 1(1/0) 1(1/0) 1(1/1)
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