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IEEE 1149.1 Test (JTAG) and Debug Pipe Control Modes
MOTOROLA M68060 USER’S MANUAL 9-35
Figure 9-13. Transition from Debug to JTAG Mode Timing Diagram
2 3 4 5 6 7 8 9 10 11 12 13 14 15
TLR TLR
TLR
CLK
TCK
JTAG
TRST
TMS
TDI
STATE
CLK
PSHIFT
JTAG
PDISABLE
PAPPLY
PTDI
ACTION
DEBUG MODE JTAG MODE
TRANSITION FROM DEBUG TO JTAG MODE
1
RTINO ACTIONAPPLYSHIFT
SeDR
NOTES:
1. Clock is shown at 2x TCK here for illustration.
2. Hold PSHIFT = L and PAPPLY = L across boundary to prevent debug command.
3. Hold TRST = L across boundary to asynchronously set to TLR state.
4. Establish TDI = H and TMS = H before starting TCK.
5. Negate TRST after starting TCK.
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