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IEEE 1149.1 Test (JTAG) and Debug Pipe Control Modes
9-24 M68060 USER’S MANUAL MOTOROLA
"191 (BC_2, *, control, 0), " &
"192 (BC_1, A(22), input, X), " & -- a[23:20]
"193 (BC_2, A(22), output3, X, 191, 0, Z), " &
"194 (BC_1, A(23), input, X), " &
"195 (BC_2, A(23), output3, X, 191, 0, Z), " &
"196 (BC_1, A(24), input, X), " &
"197 (BC_2, A(24), output3, X, 200, 0, Z), " &
"198 (BC_1, A(25), input, X), " &
"199 (BC_2, A(25), output3, X, 200, 0, Z), " &
--num cell port function safe ccell dsval rslt
"200 (BC_2, *, control, 0), " & -- a[27:24]
"201 (BC_1, A(26), input, X), " &
"202 (BC_2, A(26), output3, X, 200, 0, Z), " &
"203 (BC_1, A(27), input, X), " &
"204 (BC_2, A(27), output3, X, 200, 0, Z), " &
"205 (BC_1, A(28), input, X), " &
"206 (BC_2, A(28), output3, X, 209, 0, Z), " &
"207 (BC_1, A(29), input, X), " &
"208 (BC_2, A(29), output3, X, 209, 0, Z), " &
"209 (BC_2, *, control, 0), " & -- a[31:28]
"210 (BC_1, A(30), input, X), " &
"211 (BC_2, A(30), output3, X, 209, 0, Z), " &
"212 (BC_1, A(31), input, X), " &
"213 (BC_2, A(31), output3, X, 209, 0, Z) ";
end MC68060;
9.2 DEBUG PIPE CONTROL MODE
A debug pipe control mode is implemented on the MC68060 to allow special chip functions
to be accomplished. These functions are useful during system level hardware development
and operating system debug. Access to the debug pipe control mode is achieved by negat-
ing the JTAG signal. When in the debug pipe control mode, the regular JTAG interface is
used by the debug pipe control mode, and is therefore not available.
The debug pipe control mode uses the resulting serial interface to load commands that allow
various operations on the processor to occur. Some of the operations are: halt the central
processing unit (CPU), restart the CPU, insert select commands into the primary pipeline,
disable select processor configurations, force all outputs to high-impedance state, release
all outputs from high-impedance state, and generate an emulator interrupt.
The advantage of using the debug pipe control mode is that the processor is allowed to oper-
ate normally and at its normal frequency. The only difference is that the processor no longer
has the regular JTAG interface. This should not be a problem since the regular JTAG inter-
face is not used during normal processor operations.
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