IEEE 1149.1 Test (JTAG) and Debug Pipe Control Modes
9-12
M68060 USER’S MANUAL
MOTOROLA
81 I.Pin XTEA Input
82 I.Pin XTA Input
83 O.Pin PST0 Output
84 O.Pin PST1 Output
85 O.Pin PST2 Output
86 IO.Ctl PST4–PST0, XBR ena —
87 O.Pin PST3 Output
88 O.Pin PST4 Output
89 O.Pin XSAS Output
90 IO.Ctl XSAS ena —
91 O.Pin XBTT I/O
92 IO.Ctl XBTT ena —
93 I.Pin XBTT I/O
94 O.Pin XTS I/O
95 I.Pin XTS ena —
96 I.Pin XTS I/O
97 O.Pin XTIP Output
98 IO.Ctl XTIP ena —
99 I.Pin XSNOOP Input
100 O.Pin XBB I/O
101 IO.Ctl XBB ena —
102 I.Pin XBB I/O
103 O.Pin XBR Output
104 IO.Ctl XLOCK, XLOCKE ena —
105 O.Pin XLOCK Output
106 O.Pin XLOCKE Output
107 O.Pin TLN0 Output
108 O.Pin SIZ0 Output
109 IO.Ctl TLN0,SIZ1–SIZ0,XR_W ena —
110 O.Pin SIZ1 Output
111 O.Pin XR_W Output
112 O.Pin TLN1 Output
113 O.Pin TM0 Output
114 IO.Ctl TLN1,TM2–TM0 ena —
115 O.Pin TM1 Output
116 O.Pin TM2 Output
117 O.Pin A0 I/O
118 I.Pin A0 I/O
119 O.Pin A1 I/O
120 I.Pin A1 I/O
121 IO.Ctl A1–A0 ena —
122 I.Pin XCLA —
123 O.Pin A2 I/O
124 I.Pin A2 I/O
125 O.Pin A3 I/O
126 I.Pin A3 I/O
127 IO.Ctl A3–A2 ena —
128 O.Pin A4 I/O
129 I.Pin A4 I/O
Table 9-3. Boundary Scan Bit Definitions (Continued)
Bit Cell Type Pin/Cell Name Pin Type
