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Exception Processing
8-20
M68060 USER’S MANUAL
MOTOROLA
8.4.2 Six-Word Stack Frame (Format $2)
If a six-word stack frame is on the stack and an RTE instruction is encountered, the proces-
sor restores the SR and PC values from the stack, increments the SSP by $C, and resumes
normal instruction execution.
8.4.3 Floating-Point Post-Instruction Stack Frame (Format $3)
In this case, the processor restores the SR and PC values from the stack and increments
the supervisor stack pointer by $C. If another floating-point post-instruction exception is
pending, exception processing begins immediately for the new exception; otherwise, the
processor resumes normal instruction execution.
Stack Frames Exception Types Stacked PC Points To;
Address Field Has
CHK, CHK2 (Emulated),
TRAPcc, FTRAPcc(Emulat-
ed), TRAPV, Trace, or Zero Di-
vide
Unimplemented Floating-
Point Instruction
Address Error
Next Instruction; Address field
has the address of the instruc-
tion that caused the excep-
tion.
Next Instruction; Address field
has the calculated <ea> for
the floating-point instruction.
Instruction that caused the ad-
dress error; Address field has
the branch target address with
A0=0.
Stack Frames Exception Types Stacked PC Points To;
Effective Address Field
Floating-Point Post-Instruction Next Instruction; Effective
Address field is the calculated
effective address for the float-
ing-point instruction.
STATUS REGISTER
PROGRAM COUNTER
0 0 1 0 VECTOR OFFSET
015
SP
+$02
+$06
SIX-WORD STACK FRAME–FORMAT $2
ADDRESS
+$08
STATUS REGISTER
PROGRAM COUNTER
0 0 1 1 VECTOR OFFSET
015
SP
+$02
+$06
FLOATING-POINT POST-INSTRUCTION
STACK FRAME–FORMAT $3
EFFECTIVE ADDRESS
+$08
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