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Exception Processing
8-4
M68060 USER’S MANUAL
MOTOROLA
The MC68060 supports a 1024-byte vector table containing 256 exception vectors (see
Table 8-1). Motorola defines the first 64 vectors and reserves the other 192 vectors for user-
defined interrupt vectors. External devices can use vectors reserved for internal purposes
at the discretion of the system designer. External devices can also supply vector numbers
for some exceptions. External devices that cannot supply vector numbers use the autovec-
tor capability, which allows the MC68060 to automatically generate a vector number.
8.2 INTEGER UNIT EXCEPTIONS
The following paragraphs describe the external interrupt exceptions and the different types
of exceptions generated internally by the MC68060 integer unit. The following exceptions
are discussed:
Access Error
Address Error
*
For the Access Fault exception, refer to
8.4.4.1 Program Counter (PC)
.
“fault” refers to the PC of the instruction that caused the exception.
“next” refers to the PC of the next instruction that follows the instruction that caused the fault.
Refer to
Section 6 Floating-Point Unit
.
Table 8-1. Exception Vector Assignments
Vector
Number(s)
Vector
Offset (Hex)
Stack Frame
Format
Stacked
Program
Counter
*
Assignment
0
1
2
3
000
004
008
00C
4
2
fault
Reset Initial SSP
Reset Initial PC
Access Fault
Address Error
4
5
6
7
010
014
018
01C
0
2
2
2
fault
next
next
next
Illegal Instruction
Integer Divide-by-Zero
CHK, CHK2 Instructions
TRAPcc, TRAPV Instructions
8
9
10
11
11
11
020
024
028
02C
02C
02C
0
2
0
0
2
4
fault
next
fault
fault
next
next
Privilege Violation
Trace
Line 1010 Emulator (Unimplemented A-Line Opcode)
Line 1111 Emulator (Unimplemented F-Line Opcode)
Floating-Point Unimplemented Instruction
Floating-Point Disabled
12
13
14
15
030
034
038
03C
0
0
0
next
fault
next
Emulator Interrupt
Defined for MC68020 and MC68030, not used by MC68060
Format Error
Uninitialized Interrupt
16–23 040–05C (Unassigned, Reserved)
24
25
26
27
060
064
068
06C
0
0
0
0
next
next
next
next
Spurious Interrupt
Level 1 Interrupt Autovector
Level 2 Interrupt Autovector
Level 3 Interrupt Autovector
28
29
30
31
070
074
078
07C
0
0
0
0
next
next
next
next
Level 4 Interrupt Autovector
Level 5 Interrupt Autovector
Level 6 Interrupt Autovector
Level 7 Interrupt Autovector
32–47 080–0BC 0 next TRAP #0–15 Instruction Vectors
48–55 0C0–0DC Floating-Point Exceptions
56
57
58
59
0E0
0E4
0E8
0EC
Defined for MC68030 and MC68851, not used by MC68060
Defined for MC68851, not used by MC68060
Defined for MC68851, not used by MC68060
(Unassigned, Reserved)
60
61 0F0
0F4 0
0fault
fault Unimplemented Effective Address
Unimplemented Integer Instruction
62–63 0F8–0FC (Unassigned, Reserved)
64–255 100–3FC 0 next User Defined Vectors (192)
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