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List of Tables
xxiv
M68060 USER’S MANUAL
MOTOROLA
7-7 MC68040-Arbitration Protocol State Description ............................................. 7-56
7-8 MC68060-Arbitration Protocol State Transition Conditions.............................. 7-62
7-9 MC68060-Arbitration Protocol State Description ............................................. 7-63
7-10 Special Mode vs. IPLx Signals......................................................................... 7-74
8-1 Exception Vector Assignments .......................................................................... 8-4
8-2 Interrupt Levels and Mask Values.................................................................... 8-12
8-3 Exception Priority Groups ................................................................................ 8-17
9-1 JTAG States....................................................................................................... 9-2
9-2 JTAG Instructions............................................................................................... 9-4
9-3 Boundary Scan Bit Definitions.......................................................................... 9-10
9-4 Debug Command Interface Pins ...................................................................... 9-25
9-5 Command Summary ........................................................................................ 9-28
10-1 Superscalar OEP Dispatch Test Algorithm ...................................................... 10-4
10-2 MC68060 Superscalar Classification of M680x0 Integer Instructions.............. 10-4
10-3 Superscalar Classification of M680x0 Privileged Instructions.......................... 10-7
10-4 Superscalar Classification of M680x0 Floating-Point Instructions ................... 10-7
10-5 Effective Address Calculation Times.............................................................. 10-14
10-6 Move Byte and Word Execution Times .......................................................... 10-15
10-7 Move Long Execution Times.......................................................................... 10-15
10-8 MOVE16 Execution Times ............................................................................. 10-15
10-9 Standard Instruction Execution Time ............................................................. 10-16
10-10 Immediate Instruction Execution Times ......................................................... 10-17
10-11 Single-Operand Instruction Execution Times................................................. 10-18
10-12 Clear (CLR) Execution Times ........................................................................ 10-18
10-13 Shift/Rotate Execution Times......................................................................... 10-19
10-14 Bit Manipulation (Dynamic Bit Count) Execution Times................................. 10-19
10-15 Bit Manipulation (Static Bit Count) Execution Times...................................... 10-20
10-16 Bit Field Execution Times............................................................................... 10-20
10-17 Branch Execution Times ................................................................................ 10-21
10-18 JMP, JSR Execution Times............................................................................ 10-21
10-19 Return Instruction Execution Times ............................................................... 10-21
10-20 LEA, PEA, and MOVEM Instruction Execution Times ................................... 10-22
10-21 Multiprecision Instruction Execution Times .................................................... 10-22
10-22 Status Register (SR) Instruction Execution Times ......................................... 10-23
10-23 MOVES Execution Times............................................................................... 10-23
10-24 Miscellaneous Instruction Execution Times ................................................... 10-23
10-25 Floating-Point Instruction Execution Times.................................................... 10-24
10-26 Exception Processing Times.......................................................................... 10-26
11-1 With Heat Sink, No Air Flow........................................................................... 11-18
11-2 With Heat Sink, with Air Flow ......................................................................... 11-18
11-3 No Heat Sink .................................................................................................. 11-19
11-4 Support Devices and Products....................................................................... 11-20
C-1 Call-Out Dispatch Table and Module Size .........................................................C-4
C-2 FPU Comparison..............................................................................................C-12
C-3 Unimplemented Instructions.............................................................................C-13
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