Bus Operation
The MC68060 processor, like the MC68040, will continue to drive external address and
attribute lines, but unlike the MC68040, it may drive undefined values on the address and
attribute lines during times when the bus is still owned but idle after a previous usage. Also,
unlike the MC68040, in cases of implicit bus ownership, when the MC68060 has been
granted the bus but has not yet run a cycle, the processor does not drive the address and
attributes lines and they remain three-stated until a bus cycle is actually initiated.
Figure 7-42 shows the behavior of the MC68060 given inputs defined in Table 7-8. The
states are defined in Table 7-9. The arbitration state diagram for the MC68060-arbitration
protocol is similar to the MC68040-arbitration protocol with the exception that BB is no
longer used as an input. As with the MC68040-arbitration protocol, the end tenure state is
used to inform other bus masters the processor is relinquishing the bus.
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