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Bus Operation
MOTOROLA M68060 USER’S MANUAL 7-41
In normal applications, the requirement to keep the above-mentioned control signals
negated while exiting the LPSTOP condition should be easy to meet, since most of these
signals should already have pullup resistors and keeping alternate master activity from
occurring would allow the pullup resistors to keep these control signals negated. However,
strict compliance for the BGR and AVEC signals is not necessary because these signals are
significant only during locked sequences (BGR) and interrupt acknowledge cycles (AVEC),
neither of which is pending when exiting the LPSTOP condition.
Figure 7-32. LPSTOP Broadcast Cycle Flowchart
1) SET R/W TO WRITE
2) DRIVE ADDRESS ON A31–A0 TO $FFFFFFFF
3) DRIVE UPA1–UPA0 = 0
4) DRIVE TT1–TT0 = 3
5) DRIVE TM2–TM0 = 0
6) DRIVE TLN1–TLN0 = 0
7) ASSERT BS3–BS2
8) NEGATE CIOUT, LOCK, LOCKE, BS1–BS0
9) DRIVE SIZ1–SIZ0 TO BYTE
10) ASSERT TS FOR ONE BCLK
11) ASSERT TIP
12) DRIVE D15–D0 TO IMMEDIATE VALUE
13) ASSERT SAS IMMEDIATELY IF
ACKNOWLEDGE TERMINATION IGNORE
STATE CAPABILITY DISABLED; ELSE,
ASSERT SAS AFTER WRITE PRIMARY
IGNORE STATE COUNTER HAS EXPIRED 1) DECODE ADDRESS AND ATTRIBUTES
2) ASSERT TA, TEA, OR TRA FOR ONE BCLK
1) IF NORMAL OR BUS ERROR TERMINATION
ENTER LPSTOP MODE AFTER COMPLETION
OF BUS CYCLE
2) IF RETRY TERMINATION, RETRY LPSTOP
BROADCAST CYCLE
1) NEGATE TIP
2) THREE-STATE ENTIRE BUS IF BG NEGATED
AT BUS CYCLE TERMINATION; ELSE, DRIVE
BUS SIGNALS HIGH
PROCESSOR SYSTEM
1) PERFORM INTERNAL CLEANUP
2) ENTER LPSTOP MODE
3) DRIVE PST4–PST0 = $16
1) CONTINUE ALTERNATE MASTER ACTIVITY
AS NECESSARY WHEN PST4–PST0 = $16
2) STOP CLK AT LOW STATE IF NEEDED
3) BUS ARBITRATION MUST RECOGNIZE
THAT PROCESSOR DOES NOT PERFORM
TS-BTT TRACKING WHILE IN LPSTOP MODE
3) DRIVE BG
4) TEMPORARILY CEASE ALL ALTERNATE
MASTER ACTIVITY
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