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Bus Operation
MOTOROLA M68060 USER’S MANUAL 7-37
Note that the acknowledge termination ignore state capability is applicable to the breakpoint
acknowledge cycle. If enabled, TA, TEA, and TRA are ignored for a user-programmed num-
ber of BCLK cycles.
Figure 7-28. Interrupt Acknowledge Bus Cycle Timing
C1 C2
INTERRUPT
ACKNOWLEDGE
AVEC
C1 C2
WRITE STACK
VECTOR #
BCLK
UPA1–UPA0
D7–D0
TM2–TM0
TT1–TT0
TS
TIP
TA
R/W
BS3
CIOUT
SAS
BS2–BS0
BYTE
INTERRUPT LEVEL
MISCELLANEOUS
ATTRIBUTES
SIZ1–SIZ0
D31–D8
A31–A0
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