Floating-Point Unit
exception handler then executes an FSAVE instruction to clear the internal exception
status bit in the FPU. To return to normal operation, the user exception handler may either
clear the most significant bit of the frame format (changing the frame format from $E0 to
$60, creating an IDLE frame) prior to FRESTOREing the IDLE state frame, or discarding
the floating-point frame before executing the RTE. Given that the state frames are of a
fixed size (three long words), it is quicker to simply discard the state frame.
The exception operand provided in the floating-point frame is dependent on the highest pri-
ority exception that is reported. The exception operand as generated by the processor when
the exception is first reported may be undefined. The M68060SP calculates the proper
exception operand and executes an FRESTORE of the EXCP frame with the proper excep-
tion operand value in the floating-point frame. When the user exception handler is entered,
the required FSAVE inside the user exception handler generates the floating-point frame
and retrieves the exception operand, as calculated by the M68060SP.
The exception operand provided to the user exception handler is defined as follows for the
possible exceptions:
BSUN User Handler—Undefined.
SNAN, OPERR, DZ—Source operand in extended-precision format.
OVFL—Intermediate result in extended-precision format, but with exponent bias of $3FFF–
$6000 instead of $3FFF. If catastrophic overflow, $0.
UNFL—Intermediate result in extended-precision format but with exponent bias of
$3FFF+$6000 instead of $3FFF. If catastrophic underflow, $0.
INEX—Undefined if INEX only. Otherwise if either SNAN, OPERR, UNFL, or OVFL also set
in FPSR, use exception operand defined for either SNAN, OPERR, UNFL, or OVFL.
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