Loading...
Floating-Point Unit
6-4
M68060 USER’S MANUAL
MOTOROLA
The processor supports four rounding modes specified by the IEEE 754 standard. These
modes are round to nearest (RN), round toward zero (RZ), round toward plus infinity (RP),
and round toward minus infinity (RM). The RP and RM modes are directed rounding modes
that are useful in interval arithmetic. Rounding is accomplished through the intermediate
result. Single-precision results are rounded to a 24-bit boundary; double-precision results
are rounded to a 53-bit boundary; and extended-precision results are rounded to a 64-bit
boundary. Table 6-1 lists the encoding for the rounding mode. Table 6-2 lists the encoding
for rounding precision.
6.1.3 Floating-Point Status Register (FPSR)
The FPSR (see Figure 6-2) contains a floating-point condition code byte (FPCC), a quotient
byte, a floating-point exception status byte (EXC), and a floating-point accrued exception
byte (AEXC). The user can read or write to all defined bits in the FPSR. Execution of most
floating-point instructions modifies this register. The reset function or a restore operation of
the null state clears the FPSR. Floating-point conditional operations are not guaranteed if
the FPSR is written directly, because the FPSR is only valid as a result of a floating-point
instruction.
Figure 6-3.
Floating-Point Control Register Format
Table 6-1. RND Encoding
Encoding Rounding Mode
0 0 To Nearest (RN)
0 1 Toward Zero (RZ)
1 0 Toward Minus Infinity (RM)
1 1 Toward Plus Infinity (RP)
Table 6-2. PREC Encoding
Encoding Rounding Precision
0 0 Extend (X)
0 1 Single (S)
1 0 Double (D)
1 1 Undefined
15 14
EXCEPTION ENABLE
12 11 10 9 8
INEXACT DECIMAL INPUT
INEXACT OPERATION
DIVIDE-BY-ZERO
UNDERFLOW
OVERFLOW
OPERAND ERROR
SIGNALING NOT-A-NUMBER
BRANCH/SET ON UNORDERED
7 65432 1 0
SNAN
OPERR
OVFL UNFL DZ INEX2 INEX1BSUN PREC RND 0
ROUNDING PRECISION
ROUNDING MODE
MODE CONTROL
13
Loading...
Terms of Use | Privacy Policy | DMCA Policy
2006-2020 Rsmanuals.com