MOTOROLA M68040 USER'S MANUAL 3- 21
184.108.40.206 DYNAMICALLY ALLOCATED TABLES. Similar to paged tables, a complete
translation table need not exist for an active task. The operating system can dynamically
allocate the translation table based on requests for access to particular areas.
As in demand paging, it is difficult, if not impossible, to predict the areas of memory that a
task uses over any extended period. Instead of attempting to predict the requirements of
the task, the operating system performs no action for a task until a demand is made
requesting access to a previously unused area or an area that is no longer resident in
memory. This technique can be used to efficiently create a translation table for a task.
For example, consider an operating system that is preparing the system to execute a
previously unexecuted task that has no translation table. Rather than guessing what the
memory-usage requirements of the task are, the operating system creates a translation
table for the task that maps one page corresponding to the initial value of the program
counter (PC) for that task and one page corresponding to the initial stack pointer of the
task. All other branches of the translation table for this task remain unallocated until the
task requests access to the areas mapped by these branches. This technique allows the
operating system to construct a minimal translation table for each task, conserving
physical memory utilization and minimizing operating system overhead.
3.2.5 Table Search Accesses
The cache treats table search accesses that are not read-modify-write accesses as
cachable/write-through but do not allocate in the cache for misses. Read-modify-write
table search accesses (required to update some descriptor U-bit and M-bit combinations)
are treated as noncachable and force a matching cache line to be pushed and invalidated.
Table search bus accesses are locked only for the specific portions of the table search
that requires a read-modify-write access.
During a table search, the U-bit in each encountered descriptor is checked and set if not
already set. Similarly, when the table search is for a write access and the M-bit of the
page descriptor is clear, the processor sets the bit if the table search does not encounter a
set W-bit or a supervisor violation. Repeating the descriptor access as part of a read-
modify-write access updates specific combinations of the U and M bits, allowing the
external arbiter to prevent the update operation from being interrupted.
The M68040 asserts the LOCK signal during certain portions of the table search to ensure
proper maintenance of the U-bit and M-bit. The U-bit and M-bit are updated before the
M68040 allows a page to be accessed or written. As descriptors are fetched, the U-bit and
M-bit are monitored. Write cycles modify these bits when required. For a table descriptor,
a write cycle that sets the U-bit occurs only if the U-bit was clear. Table 3-1 lists the page
descriptor update operations for each combination of U-bit, M-bit, write-protected, and
read or write access type.