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vi M68040 USER’S MANUAL MOTOROLA
TABLE OF CONTENTS
Paragraph Page
Number Title Number
Section 1
Introduction
1.1 Differences ............................................................................................ 1-1
1.1.1 MC68040V and MC68LC040 ............................................................ 1-1
1.1.2 MC68EC040 and MC68EC040V ....................................................... 1-2
1.2 Features ................................................................................................ 1-3
1.3 Extensions to the M68000 Family ......................................................... 1-3
1.4 Functional Blocks .................................................................................. 1-3
1.5 Processing States ................................................................................. 1-5
1.6 Programming Model .............................................................................. 1-5
1.7 Data Format Summary.......................................................................... 1-9
1.8 Addressing Capabilities Summary ........................................................ 1-9
1.9 Notational Conventions ......................................................................... 1-11
1.10 Instruction Set Overview ....................................................................... 1-13
Section 2
Integer Unit
2.1 Integer Unit Pipeline.............................................................................. 2-1
2.2 Integer Unit Register Description .......................................................... 2-4
2.2.1 Integer Unit User Programming Model .............................................. 2-4
2.2.1.1 Data Registers (D7–D0) ................................................................ 2-4
2.2.1.2 Address Registers (A6–A0) ........................................................... 2-4
2.2.1.3 System Stack Pointer (A7) ............................................................. 2-5
2.2.1.4 Program Counter ........................................................................... 2-5
2.2.1.5 Condition Code Register ................................................................ 2-5
2.2.2 Integer Unit Supervisor Programming Model .................................... 2-5
2.2.2.1 Interrupt and Master Stack Pointers .............................................. 2-6
2.2.2.2 Status Register .............................................................................. 2-7
2.2.2.3 Vector Base Register ..................................................................... 2-7
2.2.2.4 Alternate Function Code Registers ................................................ 2-7
2.2.2.5 Cache Control Register ................................................................. 2-8
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