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2- 4 M68040 USER’S MANUAL MOTOROLA
2.2 INTEGER UNIT REGISTER DESCRIPTION
The following paragraphs describe the IU registers in the user and supervisor
programming models. Refer to Section 3 Memory Management Unit (Except
MC68EC040 and MC68EC040V) for details on the MMU programming model and
Section 9 Floating-Point Unit (MC68040 Only) for details on the FPU programming
model.
2.2.1 Integer Unit User Programming Model
Figure 2-3 illustrates the IU portion of the user programming model. The model is the
same as for previous M68000 family microprocessors, consisting of the following
registers:
16 General-Purpose 32-Bit Registers (D7–D0, A7–A0)
32-Bit Program Counter (PC)
8-Bit Condition Code Register (CCR)
2.2.1.1 DATA REGISTERS (D7–D0). These registers are used as data registers for bit
and bit field (1 to 32 bits), byte (8 bit), word (16 bit), long-word (32 bit), and quad-word (64
bit) operations. These registers may also be used as index registers.
2.2.1.2 ADDRESS REGISTERS (A6–A0). These registers can be used as software stack
pointers, index registers, or base address registers. The address registers may be used
for word and long-word operations.
A0
A1
A2
A3
A4
A5
A6
A7 
(USP)
PC
D0
D1
D2
D3
D4
D5
D6
D7
DATA 
REGISTERS
ADDRESS 
REGISTERS
USER 
STACK 
POINTER
PROGRAM 
COUNTER
CCR
CONDITION 
CODE 
REGISTER
01531
01531
0715
031
01531
Figure 2-3. Integer Unit User Programming Model
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