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MOTOROLA M68040 USER’S MANUAL C- 3
MC68040V
MC68EC040V
VCC
GND
BUS ARBITRATION
BG
BR
BB
BUS SNOOP CONTROL 
AND RESPONSE
M I
INTERRUPT 
CONTROL
IPL0
AVEC
IPEND
PROCESSOR 
CONTROL
CDIS
RSTI
RSTO
BCLK
TEST
TMS
TCK
TDI
POWER SUPPLY
TDO
SC0
SC1
IPL1
IPL2
STATUS AND 
CLOCKS
PST0
PST1
PST2
DATA BUS D31–D0
TRANSFER
ATTRIBUTES
MASTER
TRANSFER
CONTROL
A31–A0
ADDRESS
BUS
TS
TIP
TCI
SLAVE
TRANSFER
CONTROL
TEA
TBI
R/W
LOCKE
CIOUT
TT0
TT1
TM0
TM1
TM2
TLN0
TLN1
UPA0
UPA1
SIZ0
SIZ1
LOCK
TA
MDIS*
PST3
JS0
JS2
LFO
LOC
SCD
NOTE: *This signal is JS1 on the MC68EC040V.
Figure C-1. MC68040V and MC68EC040V Functional Signal Groups
C.2 LOW-POWER STOP MODE
The low-power stop mode is a reduced power mode of operation, that causes the
MC68040V and MC68EC040V to remain quiescent until either a reset or non-masked
interrupt occurs. This mode of operation has four phases of operation and is triggered by
the low-power stop (LPSTOP) instruction:
1. Perform a LPSTOP broadcast cycle.
2. End integer unit (IU) instruction pipeline sequencing, which is similar to the STOP
instruction sequence (IMM data ˘ SR), at termination of the LPSTOP broadcast
cycle.
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