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MOTOROLA M68040 USER’S MANUAL 1- 17
Table 1-4. Instruction Set Summary (Continued)
Opcode Operation Syntax
FNEG 2–(Source) ø FPn FNEG.<fmt> <ea>,FPn
FNEG.X FPm,FPn
FNEG.X FPn
FrNEG.<fmt> <ea>,FPn3
FrNEG.X FPm,FPn3
FrNEG.X FPn3
FNOP 2None FNOP
FRESTORE2If in supervisor state
then FPU State Frame ø Internal State
else TRAP
FRESTORE <ea>
FSAVE2If in supervisor state
then FPU Internal State ø State Frame
else TRAP
FSAVE <ea>
FScc 2If condition true
then 1s ø Destination
else 0s ø Destination
FScc.SIZE <ea>
FSGLDIV FPn ÷ Source ø FPn FSGLDIV.<fmt> <ea>,FPn
FSGLDIV.X FPm,FPn
FSGLMUL Source × FPn ø FPn FSGMUL.<fmt> <ea>,FPn
FSGLMUL.X FPm, FPn
FSQRT2Square Root of Source ø FPn FSQRT.<fmt> <ea>,FPn
FSQRT.X FPm,FPn
FSQRT.X FPn
FrSQRT.<fmt> <ea>,FPn3
FrSQRT FPm,FPn3
FrSQRT FPn3
FSUB2FPn – Source ø FPn FSUB.<fmt> <ea>,FPn
FSUB.X FPm,FPn
FrSUB.<fmt> <ea>,FPn3
FrSUB.X FPm,FPn3
FTRAPcc2If condition true
then TRAP
FTRAPcc
FTRAPcc.W #<data>
FTRAPcc.L #<data>
FTST2Condition Codes for Operand ø FPCC FTST.<fmt> <ea>
FTST.X FPm
ILLEGAL SSP – 2 ø SSP; Vector Offset ø (SSP);
SSP – 4 ø SSP; PC ø (SSP);
SSp – 2 ø SSP; SR ø (SSP);
Illegal Instruction Vector Address ø PC
ILLEGAL
JMP Destination Address ø PC JMP <ea>
JSR SP – 4 ø SP; PC ø (SP)
Destination Address ø PC
JSR <ea>
LEA <ea> ø An LEA <ea>,An
LINK SP – 4 ø SP; An ø (SP)
SP ø An, SP+d ø SP
LINK An,dn
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