MOTOROLA M68040 USER’S MANUAL A- 5
A.1 MC68LC040 DIFFERENCES
The following differences exist between the MC68LC040 and MC68040:
• The MC68LC040 does not implement the small output buffer impedance selection
• The DLE pin name has been changed to JS0.
• The MC68LC040 does not implement the data latch (DLE) or multiplexed bus modes
of operation. All timing and drive capabilities of the MC68LC040 are equivalent to
those of the MC68040 in small output buffer impedance mode.
• The MC68LC040 does not contain an FPU, which causes unimplemented floating-
point exceptions to occur using a new eight-word stack frame format.
A.2 INTERRUPT PRIORITY LEVEL ( – )
The IPL2–IPL0 pins do not have any affect on the selection of output buffer impedance.
A.3 JTAG SCAN (JS0)
The MC68040 DLE pin name has been changed to JS0. During normal operation, the JS0
pin cannot float, it must be tied to GND or Vcc directly or through a resistor. During board
testing, this pin retains the functionality of the JTAG scan of the MC68040 for compatibility
purposes. Refer to Section 6 IEEE 1149.1 Test Access Port (JTAG) for details
1149.1 Standard Test Access Port and Boundary Scan Architecture
A.4 DATA LATCH AND MULTIPLEXED BUS MODES
The MC68LC040 does not implement the data latch or multiplexed modes of operation.
The CDIS pin is ignored at the rising edge of reset. All timing and drive capabilities of the
MC68LC040 are equivalent to those of the MC68040 in small output buffer impedance
A.5 FLOATING-POINT UNIT (FPU)
The FPU is not implemented on the MC68LC040. All floating-point instructions cause an
unimplemented floating-point exception to be taken with a new eight-word stack frame
(format $4). The stack frame contains the status register (SR), program counter (PC),
vector offset, effective address of the operand (where applicable), and PC value of the
unimplemented floating-point instruction.