A- 2 M68040 USER’S MANUAL MOTOROLA
INSTRUCTION
CACHE
DATA
CACHE
DATA MEMORY MANAGEMENT UNIT
INSTRUCTION MEMORY MANAGEMENT UNIT
INSTRUCTION
ATC
DATA
ATC
INSTRUCTION
FETCH
DECODE
EFFECTIVE
ADDRESS
CALCULATE
EXECUTE
EFFECTIVE
ADDRESS
FETCH
INSTRUCTION
CACHE/ACCESS/SNOOP
CONTROLLER
BUS
CONTROL
SIGNALS
DATA
BUS
ADDRESS
BUS
DATA
CACHE/ACCESS/SNOOP
CONTROLLER
OPERAND DATA BUS
INSTRUCTION DATA BUS
B
U
S
C
O
N
T
R
O
L
L
E
R
INSTRUCTION
ADDRESS
DATA
ADDRESS
WRITE-BACK
INTEGER
UNIT
Figure A-1. MC68LC040 Block Diagram
The main features of the MC68LC040 include:
• 22 MIPS Integer Performance at 25 MHz
• Independent Instruction and Data MMUs
• 4-Kbyte Physical Instruction Cache and 4-Kbyte Physical Data Cache Accessible
Simultaneously
• 32-Bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface
• User-Object-Code Compatible with All M68000 Microprocessors
• Multimaster/Multiprocessor Support Via Bus Snooping
• Concurrent Integer Unit, MMU, Bus Controller, and Bus Snooper Operation
Maximizes Throughput
• 4-Gbyte Direct Addressing Range
• Software Support Including Optimizing C Compiler and UNIX® System V Port
®UNIX is a registered trademark of AT&T Bell Laboratories.
