Table 1-3. Notational Conventions (Concluded)
Register Codes
* General Case.
C Carry Bit in CCR
cc Condition Codes from CCR
FC Function Code
N Negative Bit in CCR
U Undefined, Reserved for Motorola Use.
V Overflow Bit in CCR
X Extend Bit in CCR
Z Zero Bit in CCR
Not Affected or Applicable.
Stack Pointers
ISP Supervisor/Interrupt Stack Pointer
MSP Supervisor/Master Stack Pointer
SP Active Stack Pointer
SSP Supervisor (Master or Interrupt) Stack Pointer
USP User Stack Pointer
<ea> Effective Address
<label> Assemble Program Label
<list> List of registers, for example D3–D0.
LB Lower Bound
m Bit m of an Operand
m–n Bits m through n of Operand
UB Upper Bound
The instruction set is tailored to support high-level languages and is optimized for those
instructions most commonly executed. The floating-point instructions for the M68040 are a
commonly used subset of the MC68881/MC68882 instruction set with new arithmetic
instructions to explicitly select single- or double-precision rounding. The remaining
unimplemented instructions are less frequently used and are efficiently emulated in the
M68040FPSP, maintaining compatibility with the MC68881/MC68882 floating-point
coprocessors. The M68040 instruction set includes MOVE16, a new user instruction that
allows high-speed transfers of 16-byte blocks between external devices such as memory
to memory or coprocessor to memory. Table 1-4 provides an alphabetized listing of the
M68040 instruction set’s opcode, operation, and syntax. Refer to Table 1-3 for notations
used in Table 1-4. The left operand in the syntax is always the source operand, and the
right operand is the destination operand. Refer to M68000PM/AD,
M68000 Family
Programmer’s Reference Manual,
for details on instructions used by the M68040.
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