The need to efficiently cool microprocessors is becoming more important as they become
more complex and require more power. In the past, the M68000 family has been able to
provide a 0–70°C ambient temperature part for speeds less than 40 MHz. However, the
MC68040, MC68LC040, and MC68EC040 with a 50 MHz processor clock has a maximum
power dissipation for a particular operating mode, a maximum junction temperature, and a
thermal resistance from the die junction to the case. This section provides a more
accurate method of evaluating the environment, taking into consideration both the airflow
and ambient temperature. This section also gives the user information to design a cooling
method that meets both thermal performance requirements and constraints of the board
environment. This section discusses the device characteristics and several methods for
thermal management as well as an example of one method for cooling the MC68040,
MC68LC040, and MC68EC040. The MC68040, MC68LC040, and MC68EC040 contain
inherent characteristics that should be considered when evaluating a method for cooling
the device. The following paragraphs discuss these die/package and power
considerations for each of these parts.
All references to the MC68040 also include the MC68LC040
and MC68EC040. Note that the MC68LC040 and MC68EC040
only implement the small buffer mode.
11.8.1 MC68040 Die and Package
The MC68040 is in a cavity-down alumina-ceramic 179-pin PGA that has a worst case
thermal resistance from junction to case of 3°C/W. The package differs from previous
M68000 family PGA packages that are cavity-up. The cavity-down design allows the die to
be attached to the top surface of the package, increasing the part’s ability to dissipate heat
through the package surface or an attached heat sink. The system designer needs to
determine the specific dimensions and design of the particular heat sink, considering both
thermal performance and size requirements.
11.8.2 MC68040 Power Considerations
The MC68040 has a maximum power rating, which varies depending on the combination
of output buffer mode and operating frequency. Note that this section assumes large
buffers terminated to 2.5 V. The large buffer output mode dissipates more power than the
small, and higher frequencies of operation dissipate more power than the lower
The MC68040 allows a combination of either large or small buffers on the outputs of the
miscellaneous control signals, data bus, and address bus/transfer attribute pins. The large
buffers offer quicker output times, allowing for an easier logic design. However, they do so
by driving about 10 times as much current as the small buffers. The designer should
consider whether the quicker timings present enough advantage to justify the additional
consideration to the individual signal terminations, the die power consumption, and the
required cooling for the device. Since the MC68040 can be powered up in one of many
output buffer modes upon reset, the actual maximum power consumption for an MC68040
Terms of Use | Privacy Policy | DMCA Policy
2006-2020 Rsmanuals.com