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10-12 M68040 USER’S MANUAL MOTOROLA
10.5 MISCELLANEOUS INTEGER UNIT INSTRUCTION TIMINGS
(Continued)
Instruction Condition <ea> Calculate Execute
ORI #<xxx>,CCR 1 4
ORI #<xxx>,SRa—91
L
+ 8
PACK Dx,Dy,#<xxx>
–(Ay),–(Ax),#<xxx>
1
3
3
2L + 3
PFLUSHb—111
L
+ 10
PFLUSHAb—111
L
+ 10
PFLUSHANb—271
L
+ 26
PFLUSHN (An)b—111
L
+ 10
PTESTR, PTESTWe—2511
L + 14
RESETa 521 521
RTDc—61
L
+ 5
RTE aStack Format $0
Stack Format $1
Stack Format $2
Stack Format $3
Stack Format $4
Stack Format $7
2
4
2
3
2
4
13
23
14
20
15
23
RTRc—71
L
+ 6
RTS c—55
SBCD Dy,Dx
–(Ay),–(Ax)
1
3
3
1L + 3
SUBX Dy,Dx
–(Ay),–(Ax)
1
3
1
1L + 2
SWAP 1 2
TRAP#a—1616
TRAPccfTaken
Not Taken
19
5
19
5
TRAPVfTaken
Not Taken
19
5
19
5
UNLK 2 1L + 1
UNPK Dx,Dy,#
–(Ay),–(Ax),#
1
3
4
2L + 4
NOTES:
a. Times listed are minimum. This instruction interlocks the <ea> calculate and execute
stages and synchronizes some portions of the processor before execution.
b. Times listed are typical. This instruction interlocks the <ea> calculate and execute stages
and synchronizes some portions of the processor before execution.
c. This instruction interlocks the <ea> calculate and execute stages.
d. Successive in-line MOVE16 instructions each add eight clocks to the <ea> calculate and
execute times.
e. Typical measurement for three-level table search with no descriptor writes, no entries
cached, and four-clock memory access times.
f. This instruction interlocks the <ea> calculate and execute stages. For the exception taken,
this instruction also synchronizes some portions of the processor before execution; times
listed are minimum in this case.
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