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MOTOROLA M68040 USER’S MANUAL 9- 5
zeros, infinities, or NANs separately from normal data types. The floating-point condition
codes allow users to efficiently detect and handle these special values.
9.2.3.2 QUOTIENT BYTE. The quotient byte (see Figure 9-4) provides compatibility with
the MC68881/MC68882 FPU. This byte contains the seven least significant bits of the
unsigned quotient as well as the sign of the entire quotient.
The quotient bits can be used in argument reduction for transcendentals and other
functions. For example, seven bits are more than enough to determine the quadrant of a
circle in which an operand resides. The quotient field (bits 22–16) remains set until the
user clears it.
23 22 21 20 19 18 17 16
SEVEN LEAST SIGNIFICANT
BITS OF QUOTIENT
S QUOTIENT
SIGN OF QUOTIENT
Figure 9-4. FPSR Quotient Byte
9.2.3.3 EXCEPTION STATUS BYTE. The EXC byte (see Figure 9-5) contains a bit for
each floating-point exception that can occur during the most recent arithmetic instruction
or move operation. The start of most operations clears this byte; however, operations that
cannot generate floating-point exceptions do not clear this byte. An exception handler can
use this byte to determine which floating-point exception(s) caused a trap.
BRANCH/SET ON 
UNORDERED
SNAN OPERR OVFL UNFL DZ INEX2 INEX1
15 14 13 12 11 10 9 8
INEXACT DECIMAL 
INPUT
INEXACT OPERATION
DIVIDE BY ZERO
UNDERFLOW
OVERFLOW
OPERAND ERROR
SIGNALING NOT-A-NUMBER
BSUN
Figure 9-5. FPSR Exception Status Byte
9.2.3.4 ACCRUED EXCEPTION (AEXC) BYTE. The AEXC byte contains five exception
bits (see Figure 9-6) that the IEEE 754 standard requires for exception disabled
operations. These exceptions are logical combinations of the bits in the EXC byte. The
AEXC byte contains the history of all floating-point exceptions that have occurred since
the user last cleared the AEXC byte. In normal operations, only the user clears this byte
by writing to the FPSR; however, a reset or a restore operation of the null state can also
clear the AEXC byte.
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