8- 26 M68040 USER’S MANUAL MOTOROLA
This bit is set for an ATC fault due to a nonresident entry (bus error during table search
or invalid descriptor encountered) or privilege violation (write protected or supervisor
only). It is cleared for a bus-errored instruction, data, or cache line-push access.
LK—Locked Transfer (Read-Modify-Write)
This bit is set if a fault occurred on a locked transfer; it is cleared otherwise.
This bit is set if a fault occurred on a read transfer; it is cleared otherwise.
The SIZE field corresponds to the original access size. If a data cache line read results
from a read miss and the line read encounters a bus error, the SIZE field in the resulting
stack frame indicates the size of the original read generated by the execution unit.
This field defines the TT1–TT0 signal encodings for the faulted transfer.
This field defines the TM2–TM0 signal encodings for the faulted transfer.
220.127.116.11 WRITE-BACK STATUS. These fields contain status information for the three
possible write-backs that could be pending after the faulted access (see Figure 8-8). For a
data cache line-push fault or a MOVE16 write fault, WB1S is zero (invalid).
V SIZE TT TM
V—Valid Write (write-back pending if set)
Figure 8-8. Write-Back Status Format
18.104.22.168 FAULT ADDRESS. The fault address (FA) is the initial address for the access that
faulted. The FA is a physical address only for cache pushes and a logical address for all
other cases. For a misaligned access that faults, the FA field contains the address of the
first byte of the transfer, regardless of which of the two or three bus transfers for the
misaligned access was faulted. For a push fault, the WB1A and FA addresses are the
22.214.171.124 WRITE-BACK ADDRESS AND WRITE-BACK DATA. Write-back addresses
(WB3A, WB2A, and WB1A) are memory pointers that indicate where to place the write-