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8- 18 M68040 USER’S MANUAL MOTOROLA
EXIT
FETCH VECTOR #0
FETCH VECTOR #1
PREFETCH 4
LONG WORDS
(DOUBLE BUS FAULT)
SP
VECTOR #0
VECTOR #1
S
M
T1, T0
I2:I0
VBR
CACR
DTTn[E-bit]
ITTn[E-bit]
1
0
0
$7
$0
$0
0
0
=
=
=
=
=
=
=
=
EXIT
(DOUBLE BUS FAULT)
(DOUBLE BUS FAULT)
ENTRY
OTHERWISE
BEGIN INSTRUCTION 
EXECUTION
OTHERWISE
BUS ERROR
BUS ERROR
BUS ERROR OR
ADDRESS ERROR
HALTED STATE
(PST3–PST0 = $5)
OTHERWISE
PC
Figure 8-5. Reset Exception Processing Flowchart
After the initial instruction is prefetched, program execution begins at the address in the
PC. The reset exception does not flush the ATCs or invalidate entries in the instruction or
data caches; it does not save the value of either the PC or the SR. If an access fault or
address error occurs during the exception processing sequence for a reset, a double bus
fault is generated. The processor halts, and the processor status (PST3–PST0) signals
indicate $5. Execution of the reset instruction does not cause a reset exception, or affect
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