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7- 70 M68040 USER’S MANUAL MOTOROLA
transfer. Edge-triggered latch B is clocked by the rising edge of BCLK and latches the
data from latch A for use by internal logic.
DQ D Q
G
TRANSPARENT
LATCH - A
EDGE-TRIGGERED
LATCH - B
DLE BCLK
TA, TEA, TBI TERMINATION
CONTROL
LATCHED
READ DATA
WRITE DATA
EXTERNAL
DATA BUS
Figure 7-47. DLE Mode Block Diagram
Figure 7-48 illustrates the data read timing for both normal operation and DLE mode.
During normal operation (i.e., DLE mode disabled), latch A is always transparent, and by
the rising edge of BCLK, read data is latched. Data must meet setup and hold time
specifications #15 and #16 in this case. When the DLE mode is enabled, the data can be
latched by the rising edge of BCLK or the falling edge of DLE, depending on the timing for
DLE.
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