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MOTOROLA M68040 USER’S MANUAL 7- 61
A31–A0
BCLK
D31–D0
TS
TA
ALTERNATE
MASTER
PROCESSOR
BR
BG
BB
AM_BR
AM_BG
PROCESSOR
SC1, SC0
SIZ1, SIZ0
TT1, TT0
R/W
MI
C1 C2 C3 C1 C2 C3
Undefined
*
*
*
AM indicates the alternate bus master.
Figure 7-40. Snoop-Inhibited Bus Cycle
7.9.2 Snoop-Enabled Cycle (No Intervention Required)
For alternate bus master accesses in which SCx = $1 or $2, indicating that snooping is
enabled, the M68040 continues to assert MI while checking for a matching cache line. If
intervention in the alternate bus master access is not required, MI is then negated, and
memory is allowed to respond and complete the access. Figure 7-41 illustrates an
example of snooping in which memory is allowed to respond. Best-case timing is
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