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xx M68040 USER’S MANUAL MOTOROLA
LIST OF ILLUSTRATIONS (Continued)
Figure Page
Number Title Number
9-9 Format of Denormalized Operand in State Frame ....................................... 9-24
9-10 MC68040 Floating-Point State Frames ........................................................ 9-40
9-11 Mapping of Command Bits for CMDREG3B Field ....................................... 9-42
10-1 Simple Instruction Timing Example .............................................................. 10-5
10-2 Instruction Overlap with Multiple Clocks ...................................................... 10-6
10-3 Interlocked Stages ....................................................................................... 10-7
11-1 Clock Input Timing Diagram ......................................................................... 11-3
11-2 Drive Levels and Test Points for AC Specifications ..................................... 11-6
11-3 Read/Write Timing ....................................................................................... 11-7
11-4 Bus Arbitration Timing.................................................................................. 11-8
11-5 Snoop Hit Timing ......................................................................................... 11-9
11-6 Snoop Miss Timing ...................................................................................... 11-10
11-7 Other Signal Timing ..................................................................................... 11-11
11-8 MC68040 Termination Network ................................................................... 11-15
11-9 Typical Configuration for RC Termination Network ...................................... 11-15
11-10 Heat Sink with Adhesive .............................................................................. 11-20
11-11 Heat Sink with Attachment ........................................................................... 11-21
12-1 PGA Package Dimensions........................................................................... 12-9
12-2 QFP Package Dimensions ........................................................................... 12-10
A-1 MC68LC040 Block Diagram ........................................................................ A-2
A-2 MC68LC040 Programming Model ............................................................... A-3
A-3 MC68LC040 Functional Signal Groups........................................................ A-4
A-4 Clock Input Timing Diagram ......................................................................... A-10
A-5 Read/Write Timing ....................................................................................... A-13
A-6 Bus Arbitration Timing.................................................................................. A-14
A-7 Snoop Hit Timing ......................................................................................... A-15
A-8 Snoop Miss Timing ...................................................................................... A-16
A-9 Other Signal Timing ..................................................................................... A-17
B-1 MC68EC040 Block Diagram ........................................................................ B-2
B-2 MC68EC040 Programming Model ............................................................... B-3
B-3 MC68EC040 Functional Signal Groups ....................................................... B-4
B-4 MC68EC040 Access Control Register Format ............................................ B-6
B-5 MC68EC040 Initial Power-On Reset Timing................................................ B-8
B-6 MC68EC040 Normal Reset Timing .............................................................. B-9
B-7 Clock Input Timing Diagram ......................................................................... B-14
B-8 Read/Write Timing ....................................................................................... B-17
B-9 Bus Arbitration Timing.................................................................................. B-18
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