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MOTOROLA M68040 USER’S MANUAL 7- 51
Figure 7-33 illustrates a functional timing diagram for an arbitration of a relinquish and
retry operation. Figure 7-34 is a functional timing diagram for implicit ownership of the bus.
In Figure 7-33, the processor read access that begins in C1 is terminated at the end of C2
with a retry request and BG negated, forcing the processor to relinquish the bus and allow
the alternate master to access the bus. Note that the processor reasserts BR during C3
since the original access is pending again. After alternate bus master ownership, the bus
is granted to the processor to allow it to retry the access beginning in C7.
A31–A0
BCLK
D31–D0
TRANSFER
ATTRIBUTES
TS
TIP
TA
ALTERNATE
MASTER
PROCESSOR
BR
BG
BB
AM_BR
AM_BG
C1 C2 C3 C4 C5 C8C6 C7
TEA
R/W
PROCESSOR
*
*
*AM indicates the alternate bus master.
Figure 7-33. Arbitration During Relinquish and Retry Timing
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