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MOTOROLA M68040 USER’S MANUAL 7- 33
C1 C2
A31–A0
BCLK
BYTE
SIZ1
TT1, TT0
TM2–TM0
D31–D8
UPA1, UPA0
CIOUT
TS
TIP
TA
R/W
SIZ0
D7–D0
INTERRUPT
ACKNOWLEDGE
INTERRUPT LEVEL
AVEC
C1 C2
WRITE STACK
VECTOR #
Figure 7-22. Interrupt Acknowledge Bus Cycle Timing
7.5.1.2 AUTOVECTOR INTERRUPT ACKNOWLEDGE BUS CYCLE. When the
interrupting device cannot supply a vector number, it requests an automatically generated
vector (autovector). Instead of placing a vector number on the data bus and asserting TA ,
the device asserts the autovector (AVEC) signal with TA to terminate the cycle. AVEC is
only sampled with TA asserted. AVEC can be grounded if all interrupt requests are
autovectored.
The vector number supplied in an autovector operation is derived from the interrupt priority
level of the current interrupt. When the AVEC signal is asserted with TA during an interrupt
acknowledge bus cycle, the M68040 ignores the state of the data bus and internally
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