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MOTOROLA M68040 USER’S MANUAL 6- 21
num cell port function safe ccell dsval rslt
"171 (BC_4, SC(0), input, X), " &
"172 (BC_4, TBI, input, X), " &
"173 (BC_4, AVEC, input, X), " &
"174 (BC_4, TCI, input, X), " &
"175 (BC_4, DLE, input, X), " &
"176 (BC_4, PCLK, input, X), " &
"177 (BC_4, BCLK, input, X), " &
"178 (BC_4, IPL(0), input, X), " &
"179 (BC_4, IPL(1), input, X), " &
"180 (BC_4, IPL(2), input, X), " &
"181 (BC_4, RSTI, input, X), " &
"182 (BC_4, CDIS, input, X), " &
"183 (BC_4, MDIS, input, X) " ;
attribute DESIGN_WARNING of MC68040: entity is
"A non-standard clocking protocol on BCLK and PCLK must be " &
"observed when entering Boundary Scan Test Mode. " ;
end MC68040 ;
6.7 MC68040, MC68LC040, MC68EC040 JTAG ELECTRICAL
CHARACTERISTICS
The following paragraphs provide information on JTAG electrical and timing specifications.
This section is subject to change. For the most recent specifications, contact a Motorola
sales office or complete the registration card at the beginning of this manual.
JTAG DC Electrical Specifications
Characteristic Symbol Min Max Unit
Input High Voltage VIH 2V
CC V
Input Low Voltage VIL GND 0.8 V
Undershoot — 0.8 V
TCK Input Leakage Current @ 0.5–2.4 V Iin 20 20 µA
TDO Hi-Z (Off-State) Leakage Current @ 0.5–2.4 V ITST 20 20 µA
Signal Low Input Current, VIL = 0.8 V
TMS, TDI, TRST IL–1.1 –0.18 mA
Signal High Input Current, VIH = 2.0 V
TMS, TDI, TRST IH–0.94 –0.16 mA
TDO Output High Voltage VOH 2.4—V
TDO Output Low Voltage VOL — 0.5 V
Capacitance*, Vin = 0 V, f = 1 MHz Cin —25pF
*Capacitance is periodically sampled rather than 100% tested.
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