MOTOROLA M68040 USER’S MANUAL 5- 3
Table 5-1. Signal Index (Continued)
Signal Name Mnemonic Function
Processor Clock PCLK 4Clock input used for internal logic timing. The PCLK frequency is exactly 2 ×
the BCLK frequency.
Test Clock TCK Clock signal for the IEEE P1149.1 Test Access Port (TAP).
Test Mode Select TMS Selects the principle operations of the test-support circuitry.
Test Data Input TDI Serial data input for the TAP.
Test Data Output TDO Serial data output for the TAP.
Test Reset TRST4Provides an asynchronous reset of the TAP controller.
Power Supply VCC Power supply.
Ground GND Ground connection.
1. This signal is only available on the MC68040.
2. This signal is not available on the MC68EC040 and the MC68EC040V.
3. These signals are different on power-up for the MC68LC040 and MC68EC040.
4. These signals are not available on the MC68040V and MC68EC040V.