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xM68040 USER’S MANUAL MOTOROLA
TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
6.2.2 HIGHZ ............................................................................................... 6-4
6.2.3 SAMPLE/PRELOAD.......................................................................... 6-4
6.2.4 DRVCTL.T ......................................................................................... 6-4
6.2.5 SHUTDOWN ..................................................................................... 6-5
6.2.6 PRIVATE ........................................................................................... 6-5
6.2.7 DRVCTL.S......................................................................................... 6-5
6.2.8 BYPASS ............................................................................................ 6-6
6.3 Boundary Scan Register ....................................................................... 6-6
6.4 Restrictions ........................................................................................... 6-12
6.5 Disabling The IEEE Standard 1149.1A Operation ................................ 6-13
6.6 Motorola M68040 BSDL Description (Version 2.2) ............................... 6-15
6.7 MC68040, MC68LC040, MC68EC040
JTAG Electrical Characteristics .......................................................... 6-21
Section 7
Bus Operation
7.1 Bus Characteristics ............................................................................... 7-1
7.2 Data Transfer Mechanism..................................................................... 7-3
7.3 Misaligned Operands ............................................................................ 7-6
7.4 Processor Data Transfers ..................................................................... 7-9
7.4.1 Byte, Word, and Long-Word Read Transfers .................................... 7-10
7.4.2 Line Read Transfer ............................................................................ 7-12
7.4.3 Byte, Word, and Long-Word Write Transfers .................................... 7-20
7.4.4 Line Write Transfers .......................................................................... 7-22
7.4.5 Read-Modify-Write Transfers (Locked Transfers) ............................. 7-26
7.5 Acknowledge Bus Cycles ...................................................................... 7-29
7.5.1 Interrupt Acknowledge Bus Cycles .................................................... 7-29
7.5.1.1 Interrupt Acknowledge BUS Cycle (Terminated Normally) ............ 7-31
7.5.1.2 Autovector Interrupt Acknowledge bus Cycle ................................ 7-33
7.5.1.3 Spurious Interrupt Acknowledge Bus Cycle................................... 7-34
7.5.2 Breakpoint Interrupt Acknowledge Bus Cycle ....................................... 7-35
7.6 Bus Exception Control Cycles............................................................... 7-36
7.6.1 Bus Errors ......................................................................................... 7-37
7.6.2 Retry Operation ................................................................................. 7-41
7.6.3 Double Bus Fault ............................................................................... 7-43
7.7 Bus Synchronization ............................................................................. 7-43
7.8 Bus Arbitration And Examples .............................................................. 7-44
7.8.1 Bus Arbitration ................................................................................... 7-45
7.8.2 Bus Arbitration Examples .................................................................. 7-52
7.8.2.1 Dual M68040 Fairness Arbitration ................................................. 7-52
7.8.2.2 Dual M68040 Prioritized Arbitration ............................................... 7-54
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