ASUS CUBX User’s Manual 101
7 . APPENDIX
LPT Port (Line Printer Port)
Logical device name reserved by DOS for the computer parallel ports. Each LPT
port is configured to use a different IRQ and address assignment.
A set of 57 new instructions based on a technique called Single Instruction, Multiple
Data (SIMD), which is built into the new Intel Pentium PP/MT (P55C) and Pentium
II (Klamath) CPU as well as other x86-compatible microprocessors. The MMX in-
structions are designed to accelerate multimedia and communications applications,
such as 3D video, 3D sound, video conference.
The OnNow design initiative is a comprehensive, system-wide approach to system
and device power control. OnNow is a term for PC that is always ON but appears
OFF and responds immediately to user or other requests. The OnNow design initia-
tive involves changes that will occur in the Microsoft Windows operating system,
device drivers, hardware, and applications, and also relies on the changes defined in
the Advanced Configuration and Power Interface (ACPI) specification.
SDRAM is Intel's goal is to ensure that memory subsystems continue to support
evolving platform requirements and to assure that memory does not become a bottle-
neck to system performance. It is especially important to ensure that the PC memory
roadmap evolves together with the performance roadmaps for the processors, I/O
PCI Bus (Peripheral Component Interconnect Local Bus)
PCI bus is a specification that defines a 32-bit data bus interface. PCI is a standard
widely used by expansion card manufacturers.
PCI Bus Master
The PCI Bus Master can perform data transfer without local CPU help and further-
more, the CPU can be treated as one of the Bus Masters. PCI 2.1 supports concur-
rent PCI operation to allow the local CPU and bus master to work simultaneously.
Plug and Play BIOS
The ISA bus architecture requires the allocation of memory and I/O address, DMA
channels and interrupt levels among multiple ISA cards. However, configuration of
ISA cards is typically done with jumpers that change the decode maps for memory
and I/O space and steer the DMA and interrupt signals to different pins on the bus.
Further, system configuration files may need to be updated to reflect these changes.
Users typically resolve sharing conflicts by referring to documentation provided by
each manufacturer. For the average user, this configuration process can be unreli-
able and frustrating. Plug and play (PnP) BIOS eliminates the ISA add-on card hard-
ware conflict problem. The PnP BIOS uses a memory block to define and remember
each card's configuration, which allows the user to change the card's IRQs and DMA
in BIOS either automatically or manually.
POST (Power On Self Test)
When you turn ON the computer, it will first run through the POST, a series of
software-controlled diagnostic tests. The POST checks system memory, the mother-
board circuitry, the display, the keyboard, the diskette drive, and other I/O devices.
PS/2 ports are based on IBM Micro Channel Architecture. This type of architecture
transfers data through a 16-bit or 32-bit bus. A PS/2 mouse and/or keyboard may be
used on ATX motherboards.
RDRAM (Rambus DRAM)
Developed by Rambus, Inc., this type of memory can deliver up to 1.6GB of data
per second. RDRAM is the first interface standard that can be directly implemented
on high performance VLSI components such as, CMOS DRAMs, memory control-
lers, and graphics/video ICs.